Device with processing unit and information storage

ABSTRACT

Embodiments related to a processing unit and a first information storage are described and depicted.

REFERENCE TO RELATED APPLICATIONS

This application is a continuation of copending U.S. patent applicationSer. No. 13/022,835 which was filed on Feb. 8, 2012 and claims thebenefit of the priority date of the above US application. The entirecontents of the above US application are hereby incorporated herein byreference.

The entire content of the above identified prior filed applications ishereby entirely incorporated herein by reference.

BACKGROUND

Data processing is nowadays implemented in almost every part of lifewith still an increasing trend for more and more implementations. Forexample, in data communications, security applications or automotiveapplications, data processing is provided in order to provide functionssuch as secure transmission of data, authentication and verification, orsafe and secure mobility. Semiconductor devices such as microcontrollerstypically having a program controller unit such as a CPU with one ormore cores are programmed in order to achieve these functions. Forstoring the data and program, data memory and program memory associatedwith the CPU is provided. Furthermore, in some systems, a furtherprocessor such as a dedicated Co-processor may be provided forprocessing certain tasks or functions.

SUMMARY

According to one aspect, a method includes providing first informationfrom a first unit into a first information storage for performing afirst operation of a processing unit. During the first operation of theprocessing unit second information is transferred between the processingunit and the at least first information storage, wherein the firstinformation storage is not accessible for the first unit during thefirst operation of the processing unit.

According to a further aspect, a device includes an operation codestorage and a data storage for storing data transferred between a firstunit and a data processing unit. The data processing unit is configuredto perform a data processing operation based on an operation codewritten in the operation code storage by the first unit. A controller isprovided to protect the data storage from writing and reading by thefirst unit when the data processing unit performs the data processingoperation and to enable writing and reading for at least the first unitwhen the data processing operation is completed.

According to a further aspect, an information storage arrangementincludes an operation code storage and a data storage, wherein the datastorage includes a plurality of sub-unit storages. A controller isprovided to configure, prior to a data processing operation associatedwith an operation code stored in the operation code storage, for each ofthe plurality of sub-unit storages a read/write protection during theexecution of the operation code.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

FIGS. 1A and 1B show block diagrams according to example embodiments;

FIG. 2 shows a flow chart diagram according to an example embodiment;

FIG. 3 shows a flow chart diagram according to an example embodiment;

FIGS. 4A to 4D show examples according to an embodiment;

FIG. 5 shows a block diagram according to an example embodiment; and

FIG. 6 shows a block diagram according to an example embodiment.

DETAILED DESCRIPTION

The following detailed description explains exemplary embodiments of thepresent invention. The description is not to be taken in a limitingsense, but is made only for the purpose of illustrating the generalprinciples of embodiments of the invention while the scope of protectionis only determined by the appended claims.

In the exemplary embodiments shown in the drawings and described below,any direct connection or coupling between functional blocks, devices,components or other physical or functional units shown in the drawingsor described herein can also be implemented by an indirect connection orcoupling. Functional blocks may be implemented in hardware, firmware,software, or a combination thereof.

Further, it is to be understood that the features of the variousexemplary embodiments described herein may be combined with each other,unless specifically noted otherwise.

In the various figures, identical or similar entities, modules, devicesetc. may have assigned the same reference number.

Referring now to FIG. 1A, a device 100 is shown including a first unit102, a data processing unit 104 for performing an operation requested bythe first unit 102 and first information storage 106 a as part of aninformation storage assembly 106. The device may be for example amicrocontroller, a board including a microcontroller, a component inwhich one or more semiconductor devices are implemented etc.

In some embodiments, the first unit 102 may for example be aprogram-controlled unit. The first unit 102 may for example then includea CPU core. In some other embodiments, the first unit 102 may be aperipheral. The device 100 may include connection circuitry such as abus for allowing communication between the first unit 102 and theprocessing unit 104 which are separated units. Furthermore interfacesfor communication may be provided or associated with the first unit 102,the processing unit 104 and the first information storage 106 a. As anexample interfaces for transferring an operation code or data may beprovided within the first unit 102.

The processing unit 104 may be assigned to the first unit 102 forperforming data processing initiated by the first unit 102. For example,an application running on a main CPU core included in the first unit ora logic included in a peripheral may initiate a transfer of an operationcode such as a command or a subroutine over a bus to an operation codestorage associated with the processing unit 104 in order to request anoperation from the processing unit 104.

Thus, in some embodiments, the information storage 106 may include anoperation code storage such that an operation code is written by thefirst unit 102 to the operation code storage to initiate the operation.Examples of operation codes include operation codes for executing asubroutine, a sequence of subroutines or a command etc. An exampleembodiment is shown in FIG. 1B in which an operation code storage 106 bis provided as part of the information storage 106 of the device 100.

As will be described later, in example embodiments the operation codestorage may be configurable such that the operation code storage can beset to be protected against writing of operation codes during theoperation.

Operations executed by the processing unit 104 may in some embodimentsinclude execution of dedicated data processing. In some embodiments,operations executed by the processing unit 104 include variousoperations associated with a set of operation codes. The set ofoperation codes may include operation codes for a command such as acommand word or operation codes of a subroutine such as a subroutineexecution word or operation codes for a sequence of subroutines.

The first information storage 106 a may include any type of digitalinformation storages such as buffers, registers, RAM-memories etc. Inexamples, the first information storage 106 a may for example includestorage of the volatile type such as storage based on transistors, forexample a register or buffer. The information storage assembly 106 mayin some embodiments include other information storages which may be ofthe same or of different type than the first information storage 106 a.

In some embodiments, additional storages such as non-volatile memoriesmay be provided within the device 100 such as a ROM for booting or aflash memory for storing data information or program information. Thenon-volatile storages may be partitioned or separated according tofunctional needs, for example a flash memory may be partitioned into adata flash memory, a program flash memory and a key flash memory. Someof the additional non-volatile memory may also be access restricted suchthat for example only the processing unit 104 is allowed to read/writeon a key flash memory since keys stored in the flash memory areconsidered secure information only available for the processing unit104.

The first unit 102 is coupled to the first information storage 106 a forexample via a bus and the processing unit 104 is also coupled to thefirst information storage 106 a for reading and writing information. Insome embodiments, the processing unit 104 is implemented within amodule, the first information storage 106 a being also part of themodule. The module or the processing unit 104 may in some embodimentshave a master and slave functionality such that the function of a masterof the bus as well as the function of a slave of the bus can beprovided.

In example embodiments, the processing unit 104 may be a secure dataprocessing extension for the first unit 102 such as a cryptographicprogram controlled engine or cryptographic state machine. The processingunit 104 may for example execute security-related operations forperforming security-related data processing which may include encodingor decoding, code verification, authentication and other processing. Anexample list of security operations include AES standard 128 bitcryptographic functions such as ECB encryption, ECB decryption, CBCencryption, CBC decryption, CMAC generation, CMAC verification etc.

Security-related operations may for example be used in the device 100for authentication or authorization of new items, units, assembly groupsetc when newly implemented or integrated or when replacing existingitems. Furthermore, security-related operations may for example be usedin the device 100 for decoding a software code in order to providesoftware security or other encoding or decoding functions for the device100. Moreover, security-related operations may for example be used inthe device 100 for providing secure booting of the device by detectingfalse or corrupted software provided to the CPU. However, it is to benoted that the above are only some examples of the many uses of securityrelated operations.

In some embodiments, a set of specific security-related operation codesmay be provided for initiating a respective type of security-relatedoperations. The processing unit may then be configured to decode andprovide an execution of at least one security-related subroutine orsecurity-related command for the first unit.

In some embodiments, the processing unit 104 may be a substantiallyhardware-based processing unit such as a state machine which provideshardware-based data processing. For example, in one embodiment, theprocessing unit 104 may be a security hardware extension providing theabove described security-related operations. While a hardware-based dataprocessing may limit the flexibility of the system, it adds however tothe security of the data processing in view of being less prone tomanipulations from hostile users.

In other embodiments, the processing unit 104 may be a CPU or processingunit of a CPU-related type.

Examples of the information transferred and stored in the informationstorage 106 a includes data related to a type of operation, inputparameters of the operation such as input parameters of a command orsubroutine or other parameters which are associated or required by theprocessing unit 104 with respect to the execution of a data processingoperation. Furthermore, in some embodiments, the first informationstorage 106 a is also storing the output information of the operationexecuted by the processing unit 104 which are to be output after theexecution. The output information may for example be transferred to thefirst unit 102 which requested the operation. Such output informationinclude output parameters of a subroutine or command which such asresults, intermediate or partial results or any other output parameterrelated to the operation which was executed by the processing unit 104.In some embodiments, the first information storage may for example be adata storage storing the input and output data information.

In example embodiments, the first information storage 106 a iscontrolled with regards to read/write access in a manner which isdifferent from known usages of information storages. The firstinformation storage 106 a being in general accessible by the first unit102 and the processing unit 104 for reading and writing of information,is set temporarily to be not accessible for the first unit 104. In moredetail, the first information storage 106 a is set to be during anoperation of the processing unit 104 no longer accessible for the firstunit 102. However, the first information storage 106 a is still fullyaccessible for the processing unit which executes the operation.

In other words, the first information storage 106 a has a specificaccess protection which protects the first information storage 106 afrom a write or read access by the first unit 102 (and any otherexternal unit if provided) while the first information storage 106 a ishowever fully accessible by the processing unit 104 during theoperation. For example, the processing unit 104 may during the operationread the information stored in the first information storage 106 a, theprocessing unit 104 may write information such as intermediate orinternal parameter values, results or other information during theoperation to non-used locations of the first information storage 106 aor may overwrite the information stored in the first information storage106 a with new information. In example embodiments, the above describedaccess protection may be hardware-implemented, i.e. the logic preventingthe access may be fully hardware-implemented logic. This may additionalprovide security as no modifications to the security mechanism can bemade by a potential attacker.

The above described setting of the first information storage 106 a in afirst access mode in which the information storage 106 a is fullyaccessible by the first unit 102 and the processing unit 104 or otherexternal units and in a second access mode in which the firstinformation storage 106 a is only accessible by the processing unit withrestricted access by the first unit 102 (and any other external unit ifprovided) allows a secure operation such that the data processingexecuted by the processing unit 104 can be provided insular. Moreover,the first information storage 106 a can be used by the processing unit104 to store internal information during the operation such asintermediate data processing results, pointer values etc. during dataexecution etc. This information may be security-critical and isprotected by the above described access protection control from anyexternal read during the operation. Information written in the firstinformation storage 106 a which is no longer necessary may be deleted ormay be overwritten with other information by the processing unit 104.

While additional circuitry may be required for implementing the abovecontrolling of protection, a reduction of the memory space can beachieved in view of the internal use of the first information storageduring operation while still a secure and insular data processing isprovided during a security-related operation by the processing unit 102.

It should be noted that in example embodiments the first unit 102requested the operation to be performed by the processing unit 104 bytransferring an operation code to an operation code storage andtransferring information to the first information storage 106 a, but thefirst unit 102 is essentially upon starting the operation automaticallydeprived of any access or control over the first information storage 106a at least as long as the operation is executed by the processing unit104. This allows the very efficient usage of storage space since thestorage space of the first information storage 106 a may be used fordifferent tasks such as writing an input parameter by the first unit102, reading an output parameter by the first unit 102 and storinginformation during operation by the processing unit 104 while stillpreventing an attacker from extracting any information related to theinternal data processing provided by the processing unit 104.

In some embodiments, the first information storage 106 a is provided byan interface or as part of an interface between the first unit 102 andthe processing unit 104. Such an interface may be a user interface. Insome embodiments, the interface may have in addition to the firstinformation storage operation code storage and/or a status bit storage.The first unit 102 may for example request an operation executed by theprocessing unit 104 by transmitting information to the informationstorage 106 and provide information related to the operation such asinput parameters etc to the first information storage 106 a. Such aninterface having the above access-protection may then be considered as asecure interface between the processing unit 104 and the first unit 102since it secures and provides insular operation of the processing unit104 during the execution of the operation.

The access protection may be provided in some embodiments in ahardware-like manner. In some embodiments, the first information storage106 a may be electrically decoupled by control of transistors to preventwriting or reading when being access protected. In some embodiments, alogic circuit may be implemented which provides a predetermined bitsequence such as a bit sequence with all zeros back to the first unit102 when reading is attempted during access protection by the firstunit.

In example embodiments, the control of the access protection is externalto the first unit 102 for example within a controller associated withthe first information storage 106 a or a controller associated with theprocessing unit 104.

In some embodiments, the access protection for the first informationstorage 106 a is controlled by the processing unit 104. Furthermore, thecontrolling with regards to which physical storages are part of thefirst information storage 106 a and therefore the control of the size ofthe first information storage 106 a may also be provided by theprocessing unit 104. FIG. 6 shows a block diagram of an example in whichthe processing unit 104 controls the access protection for the firstinformation storage 106 a, the operation code storage 106 b and a statusinformation storage 106 c. The first information storage 106 a, theoperation code storage 106 b and the status storage 106 c are part of auser interface 108 which is coupled to a bus interface 110. The businterface 110 is capable to connect to a bus 112 for transferringinformation from the first information storage 106 a, the operation codestorage 106 b or the status information storage 106 c via the bus 112 tothe first unit 102 (not shown in FIG. 6) and vice versa from the firstunit 102 to one of the storages 106 a, 106 b or 106 c. The userinterface 108 is further coupled to the processing unit 104 fortransferring the information stored therein to the processing unit 104and vice versa information from the processing unit 104 to the userinterface 108.

The controller may in one embodiment be implemented to switch the firstinformation storage from a first operation mode to a second operationmode based on the operation code written in the operation code storageby a first unit. The data information storage is in the first operationmode configured to be read/write accessible for the first unit and inthe second operation mode configured to be read/write accessible onlyfor a processing unit executing a data processing based on the operationcode.

The access protection control as outlined in the above exampleembodiments may be used to provide a flexible security protection aswill be further outlined below. For example, in one embodiment the firstinformation storage may comprise or may be subdivided into a pluralityof sub-unit storages. For example in one embodiment a sub-unit storagemay be a single register such that the first information storage 106 acomprises a plurality of single registers. However, other sub-unitstorages may be provided by subdividing the information storage 106 intoa plurality of regions, parts or sections. Each of the plurality ofsub-unit storages may then be individually access-protected independentof each other sub-unit storage. The access protection may be changedduring data processing. For example, when the execution of a subroutineor a command during the data processing is completed, the type ofprotection may be changed for the execution of the next subroutine orcommand within the same data processing. Moreover, each of the differentsub-unit storages can have a different type of protection for example, afirst type of read/write protection (no read and write access) withrespect to the first unit 102 during the execution of an operation, asecond type which allows a reading and writing for the first unit 102during the execution or a third type which allows only reading but notwriting for the first unit 102 etc. In other words, the accessprotection can be individually and independently set for each sub-unitstorage and the access protection can be individually and independentlyset in an active protection for reading, writing or both.

In one embodiment, prior to starting an operation during the dataprocessing by the processing unit 104, it may be determined which of theavailable information storage 106 is included in the first informationstorage 106 a having the above outlined access protection. Bydetermining the first information storage 106 a prior to execution of anoperation, the storage size of the first information storage 106 a canbe changed during the data processing. The type of access-protection forthe first information storage or for each sub-unit storage may also bechanged prior to the start of an operation during data processing. Forexample, when the first information storage 106 a includes a pluralityof registers, a first set of registers from the plurality of registersmay be determined to be part of the first information storage having theabove described access protection and an individual access-protectionmay be assigned to each register. Such determining may in one embodimentbe dependent on the type of operation. In one embodiment, thedetermining may be provided after determining the operation code whichis provided to the operation code storage. In other words, the size ofthe information storage having a particular protection with regards towrite and/or read can be individually tailored during the dataprocessing to the needs for the current operation for example before thestarting of a specific operation during the processing.

In some embodiments, a selective protection can be provided duringoperation of the processing unit 104 which allows write-access (orread-access or both) only for one specific operation code or a specificgroup of operation codes while write-protection is maintained for allother operation codes. In some embodiments, such a selective protectionis implemented in an operation code storage. In other words, theoperation code storage is then selectively protected against writing ofoperation codes during the operation. In an example embodiment, thespecific operation code allowed for writing during operation of theprocessing unit 104 may be an operation code for an abort commandresulting in an aborting of the operation. This restricts thepossibility of attacks during an operation and allows only to abort anoperation but not to provide any other operation codes during anoperation.

Furthermore, in some embodiments a control may be provided which allowsafter completion of the execution of an operation code only a specificoperation code to be next executed. For example, operation codes may beallowed to be sequentially executed only in a particular order. Thisadds additional security against possible attacks and prevents detectingof information with respect to the data processing of the processingunit 104.

In some embodiments, the information storage 106 may include in additionto the first information storage 106 a at least one further informationstorage which may be readable and/or writeable during the operation ofthe processing unit 104. For example, the information storage 106 mayinclude a status information storage which according to one embodimentmay be provided readable for the first unit 102 during the operation ofthe processing unit 104.

After the execution of the operation, the first information storage 106a can be made again accessible for the first unit 102. The first unit102 is then allowed to read from the first information storage 106 ainformation such as an output parameter of the operation, a status ofthe operation or information indicating an error occurred during theoperation. In some embodiment, the first information storage 106 a maybe made accessible only after a sequence of operations such as asequence of commands or a sequence of subroutines are completed. In someembodiments, the first information storage may be made after a completedoperation readable but not writeable and only read/write-accessibleafter a sequence of operations is completed.

In some embodiments, an interrupt may be provided after the completionof an operation to notify the first unit 102 or the system on thecompletion. The providing of an interrupt may in some embodiments bedepending on the operation code. In some embodiments, one or morededicated bits may be provided in an operation code storage to indicatewhether an interrupt is provided after completion of the operationindicated by the operation code.

In some embodiments, an interrupt may be provided after the abortion ofan operation. In some embodiments, an interrupt is suppressed after anabortion of an operation. In some embodiments, a selective interruptmechanism may be provided which allows configuring whether an interruptis provided after an abortion of the operation or not. The selectiveinterrupt scheme allows additional flexibility and a tailored use interms of security for the system.

The first information storage 106 a may be functionally subdivided inaccordance with the output information provided to the first unit 102.For example, the first information storage 106 a may include a statusinformation storage dedicated for outputting the status of the operationfor example by one or more status bits, or an error information storagededicated for outputting error information indicating the occurrence ofan error and/or the type of an error during the operation. As outlinedabove, also for these information storages the access-protection can beprovided in an individual and independent manner.

In some embodiments, a change of the status such as a change indicatedby a status bit in the status information storage may cause the flaggingof an interrupt. In some embodiments, the operation code storage maycontain a dedicated storage for storing one information indicatingwhether an interrupt is to be flagged after completion of the operationand/or after abortion of an operation. Such information may in someembodiments be an Interrupt-Enabled bit stored in the operation codestorage. In some embodiments, the Interrupt-Enabled bit can be alteredduring the execution of an operation. This allows suppressing aninterrupt when an operation is aborted. To this end, theInterrupt-Enabled bit may be deleted or altered from enabled to disabledwhen the operation code for abortion of the operation is written in theoperation code memory.

As already mentioned above, the device 100 may in some embodimentsinclude in addition to the first unit 102 other units which areconnectable to the first information storage 106 a for requesting andproviding input parameter information for the operation of theprocessing device 104. In some embodiments, the first storage 106 a istherefore coupled to a bus having multiple units connected theretoincluding the first unit 102. FIG. 5 shows an example of a device 100having a program controlled processor 500 with a CPU Core 502 and aperipheral 504. The processor 500 and the peripheral 504 are connectedvia a crossbar interconnect 506 to information storage assembly 106including the first information storage 106 a and the operation codestorage 106 b. The information storage assembly 106 is part of a module510 including also the processing unit 104. An information storageassembly 508 is provided which may for example include a Boot ROM, adata flash, a program flash and a key flash. The processor 500 and theperipheral 504 are connected via the crossbar 506 to the second storageassembly 508. The module 510 is also connected to the storage assembly508 to read or write data there from. Some portions of the storageassembly 508 such as a key flash may be exclusively accessible by theprocessing unit 104 for security reasons.

A flow chart 200 of an example process which may be implemented forexample in the device 100 will now be shown with respect to FIG. 2. Theflow chart 200 starts at 202 with the providing of first informationfrom a first unit into a first information storage for performing afirst operation of a processing unit.

The first information storage is set at 204 to be non-accessible for thefirst unit. The first information storage is secured against a readingfrom the first information storage by the first unit and against awriting into the first information storage by the first unit. Thesetting of the first information storage to be not accessible for thefirst unit during the operation is in embodiments activatedautomatically when the operation code for performing the operation isstored in the operation code storage after it has been transferred fromthe first unit to the operation code storage. In other words, the firstinformation storage is automatically locked for access protection by thefirst unit when the operation code storage is stored in the operationcode storage. Setting the first information storage to be non-accessiblefor the first unit 102 may be achieved by an automatic locking into theabove described access protection based on the writing of the operationcode in the operation code storage. In some embodiments, the automaticlocking may be hardware-implemented. For example, a hardware implementedlogic may determine a code word written into the operation code storageand may depending on this determination lock the first informationstorage. In some embodiments, if the first unit 102 attempts or tries toread from the first information storage during the locking, a predefinedbit pattern, for example an information including only bits of value 0may be returned to the first unit 102. In some embodiments, if the firstunit 102 attempts or tries to write information in the locked state, thewriting may be ignored without returning a message. In some embodiments,an information such as a message may be returned to the first unit 102.

At 206, second information is transferred between the processing unitand the at least first information storage during the first operation ofthe processing unit. The second information can be written by theprocessing unit into the first information storage because the firstinformation storage is read/write-accessible for the processing unitduring the operation of the processing unit. In example embodiments, theprocessing unit is during the operation of the processing the only unithaving read/write access to the first information storage.

In example embodiments, the processing unit accesses the information inthe first information storage 106 a during the operation to calculate atleast one result based on the information.

Thus, at least a part of the information from the first informationstorage 106 a may be transferred to the processing unit during the firstoperation, for example to internal registers of the processing unit 104.

As outlined above, a type of operation of the processing unit isselectable by the first unit as a result of a transferred operation codeindicating for example a command or a subroutine to be executed by theprocessing unit. The operation code may be stored in an operation codestorage. The processing device may read the operation code from theoperation code storage, decode and analyze the operation code andprovide the operation based on the operation code. The operation codestorage may however be write-protected selective with regards to theoperation codes, i.e. one or more specific operation codes may beallowed to be written while the rest is blocked. An example of a flowchart 300 is shown in FIG. 3.

The flow chart 300 starts at 302 with the transmitting of the firstinformation from the first unit to the first information storage. At304, the first unit writes an operation code into an operation codestorage. The operation code storage may for example include a commandbuffer or command register. The first information storage and theoperation code storage may in an example embodiment both be part of aninterface provided between the processing unit and the first unit.

At 306, the operation code storage is then set to be write-protectedwith respect to the first unit. The setting of the write-protection withrespect to the first unit is in embodiments activated by the writing ofthe operation code provided by 304. The write-protection may be aselective write-protection such that the write-protection is enabled fora group of operation codes while the operation code storage is at leastfor one operation code not write-protected. Furthermore, at 306 thefirst information storage is set write/read-protected with respect tothe first unit. The write-protection of the operation code storage andthe write/read-protection of the first information storage may be basedon and activated by the writing of the operation code into the operationcode storage. At 308, the processing unit may then execute a dataprocessing operation such as the execution of a requested subroutine ora command based on the operation code transferred from the first unit tothe operation code storage. At 310, the information in the firstinformation storage is cleared and an output of the data processing suchas a result for the requested operation or other output parameters iswritten by the data processing unit in the first information storage.Then, at 312, the output of the data processing is read out by the firstunit.

In example embodiments, the first information storage may automaticallybe locked against read/write access by the first unit based on theoperation code in the operation code storage.

In some example embodiments, the data processing unit may inform thefirst unit on the new status of the operation as being completed.

When the operation is aborted by writing an abort operation code intothe operation code storage, at least a part of the information in thefirst information storage may not be accessible, i.e. readable for thefirst unit after the operation has been aborted. To this end,information may be deleted when an operation code for abortion isprovided. In some embodiments, all information of the first informationstorage may be inaccessible for the first unit after abortion, forexample by deleting all the information in the first informationstorage.

Furthermore, when the operation is completed without abortion, only apart of the information such as an expected output result of thesubroutine or command may be readable for the first unit. In this way,information which are written by the processing unit during theoperation for example as internal or intermediate result values andwhich may be security-critical in terms of allowing gaining ofinformation related to the operations, structure of function of theprocessing unit can be prevented from being output to the first unit. Tothis end, according to an example, the output result of the operation iswritten in the first information storage and at least a part of theinformation except the output result is cleared or removed when theoperation is completed or aborted. Only after the deletion of theinformation, read/write access for the first unit is given to the firstinformation storage.

In other words, the first information storage prevents a first part ofinformation within the first information storage from being externallyoutput after the operation is completed or aborted but allows a secondpart of information within the first information storage to be output tothe first unit after the operation is completed.

In an embodiment, a restriction control circuit may be implemented toprovide the access control for the first information storage. Therestriction control circuit may restrict an access to the firstinformation storage in the following manner. When the first unitrequests an execution of a subroutine or command, which is to beexecuted by the processing unit information for executing the subroutineor command is provided from the first unit to the first informationstorage. After the information is provided to the first informationstorage, access restrictions which restrict the access of the firstinformation storage are provided for the first unit and possible otherunits except for the processing unit.

In addition, as already outlined above, access restrictions may also beprovided for a second information storage such as for example anoperation code storage.

FIGS. 4A to 4D show now timing diagrams of example usages in accordancewith the above described first information storage and operation codestorage.

FIG. 4A shows a timing diagram for an example in which three operationsdesignated in FIG. 4A as OP1, OP2 and OP3 are performed sequentially aspart of a data processing. The operations may for example include anexecution in accordance with the operation code of three command words.Prior to the starting of operation OP1, the first information storageand the operation code storage are write-enabled and read-enabled(read/write enabled). An operation code for operation OP1 is thentransferred from the first unit to the operation code storage and theinput parameters for Operation 1 are transferred from the first unit tothe first information storage. After the storing of the operation codeand the input parameter for operation OP1, the protection mode of thefirst information storage is then changed from read/write enabled toread/write protected with respect to the first unit and all otherexternal units. With respect to the processing unit executing theoperation OP1, the first information storage is still read/writeaccessible. In the operation code storage, the access protection ischanged from read/write enabled to write blocked. In the example shownin FIG. 4A, the write blocked mode is a selective blocking mode whichblocks the writing for all operation codes except for predeterminedoperation codes such as an operation code for abortion of an operation.The storage provided for the at least one input parameter and the atleast one output parameter is in embodiments dynamically configurablesuch that for each operation storage can be assigned for the input andoutput parameters depending on the operation executed. In someembodiments, the storage for the input and output parameters may overlapsuch that the storage for the input parameters is at least partiallyused for storing output parameters.

During the execution of the operation OP1, the first information storageand the operation code storage remain in the above described mode. Aftercompleting the execution, the first information storage is again set tobe read/write enabled. The data processing unit may then inform thefirst unit on the new status of the operation being completed and thefirst unit may read out an output parameter written into the firstinformation storage by the processing unit during the execution.Furthermore, after completing the first operation OP1, the operationcode storage is again set to be read/writable. The new operation codefor operation OP2 and the new input parameter for operation OP2 are thentransferred and stored in the operation code storage and the firstinformation storage, respectively, and the operation Op2 is executed aswell as a further operation OP3 in the manner described above.

FIG. 4B shows the example of FIG. 4A when an abortion occurs duringoperation OP2. As can be seen in FIG. 4B, an abort operation code istransferred from the first unit to the operation code storage during theexecution of operation OP2. Although the operation code is set to beselective write blocked, since the abort operation code is amongst thespecific operation codes, the abort operation code is allowed to bewritten into the operation code storage.

After the abort operation code is written into the operation codestorage, the operation is aborted and information stored in the firstinformation storage is cleared. As outlined above, all informationstored in the first information storage may be deleted or a selectivedeleting of information may be performed. After the information from thefirst information storage is cleared, the first information storagereturns to the read/write enabled mode allowing further to writeinformation therein. Also the operation code storage returns to the modein which read/write is enabled.

FIG. 4C shows an example in which a sequence of operations OP1 a, OP1 b,OP1 c is performed with the outputting of intermediate results aftereach completed operation. The sequence of operations is for example inone embodiment a sequence of subroutines or commands. At the beginning,the first information storage and the operation code storage areread/write enabled and the input parameters are written in the firstinformation storage. The operation code OP1 a for performing operationOP1 a is written into the operation code storage. Then after OperationOP1 a is completed, the first information is set to be read enabled butnot to be write-enabled. This allows the intermediate result of eachoperation to be read out from the first information storage. Only aftercompletion of the overall sequence, the first information storage aswell as the operation code storage is set read/writeable for all units.After completion of the operations 1 a and 1 b, the operation codestorage is again set to be writeable for the first unit to allow therespective subsequent Operation Code in the sequence to be written intothe Operation Code storage. The writing of the Operation Code thenautomatically activates the switching to the mode in which the readingand writing access on the first information storage and the writingaccess on the operation code storage (except for the selective OperationCodes) is blocked for the first unit.

For each operation of a subroutine or operation sequence, new inputparameter may be written in the first information storage prior to thestarting of the respective operation. This may depend on the previousoperation which sets the access protection for the first informationstorage. Thus, in some embodiments, the previous executed operationwithin a sequence of operations determines which access protection isapplied between two successive operations. Instead of switching for thefirst information storage between the successive operations to theprotection mode “Read enabled/Write blocked” as shown in FIG. 4C, thefirst information storage may switch after the completing of anoperation to the mode “Read/Write Enabled” which allows in addition tothe reading of the intermediate results also the writing of the one ormore new input parameter into the first information storage. The twoabove access protections between successive operations within a sequenceof operations may therefore in some embodiments occur both within onesequence of operations such that after one operation code no new inputinformation is input and therefore the protection mode is switched tothe mode Read enabled/Write blocked while for another operation code theprotection mode is switched to the Read/Write enabled to allow writingof new input parameters.

Furthermore, in some embodiments the access protection between twooperations of a sequence of operations may be different for differentportions or parts of the first information storage. For example, acertain portion of the first information storage or selectedsub-storages (for example registers) of the first information storagemay be set after an operation to be “Read enabled/Write blocked” whileanother portion or other selected sub-storages of the first informationstorage may be “Read/Write enabled” after the same operation. Thisallows when new input parameters are to be written between twosuccessive operations that only a restricted area is allowed to beaccessed by the first unit while the other storage areas or sub-storagesof the first information storage are still protected. The selectedportions or the sub-storages of the first information storage which arewrite-enabled after an execution may be dynamically selected dependingon the operation code executed.

In some embodiments, the storage space of the first information storagemay be utilized different for input parameters than for outputparameters. Furthermore, in some embodiments output parameters areallowed to overwrite input parameters in order to utilize the storagespace in a most efficient manner.

FIG. 4C thus shows that in some examples the first information storagemay be at least selectively accessible when an operation is notperformed by the processing unit for example between two successiveoperations.

FIG. 4D shows an example similar to FIG. 4C without the reading ofintermediate results after each completed subroutine. Here the firstinformation storage 106 a is set from the beginning of the firstoperation OP1 a of the sequence until the completion of the lastoperation OP1 c of the sequence to be read/write blocked (except for theprocessing unit).

The above described examples show that an individual and flexibleprotection can be achieved with the described protection mechanism. Theprotection can for example include different types of protection fordifferent types of operation codes. Furthermore, although not shown inFIGS. 4A-4D, only a part of the first information storage 106 a may havethe above described protection while other parts of the firstinformation storage may have during the execution of the operationsother protections with regards to read and write. In other words, theprotection may include different protection types assigned to thedifferent portions or sub-storages of the first information storage.Furthermore, the assignment for the different portions or sub-storagesmay in some embodiments be depending on the type of operation code asoutlined above. In addition to the first information storage 106 a, asecond or further information storage may be provided with the sameprotection mechanism allowing with regards to the first, second andfurther information storages different types of protection during theexecution of an operation by the processing unit. Also other informationstorages which may have a fixed protection scheme may be provided forexample a protection allowing exclusive reading and writing only for theprocessing unit.

In the above description, embodiments have been shown and describedherein enabling those skilled in the art in sufficient detail topractice the teachings disclosed herein. Other embodiments may beutilized and derived there from, such that structural and logicalsubstitutions and changes may be made without departing from the scopeof this disclosure.

This Detailed Description, therefore, is not to be taken in a limitingsense, and the scope of various embodiments is defined only by theappended claims, along with the full range of equivalents to which suchclaims are entitled.

Such embodiments of the inventive subject matter may be referred toherein, individually and/or collectively, by the term “invention” merelyfor convenience and without intending to voluntarily limit the scope ofthis application to any single invention or inventive concept if morethan one is in fact disclosed. Thus, although specific embodiments havebeen illustrated and described herein, it should be appreciated that anyarrangement calculated to achieve the same purpose may be substitutedfor the specific embodiments shown. This disclosure is intended to coverany and all adaptations or variations of various embodiments.Combinations of the above embodiments, and other embodiments notspecifically described herein, will be apparent to those of skill in theart upon reviewing the above description.

It is further to be noted that specific terms used in the descriptionand claims may be interpreted in a very broad sense. For example, theterms “circuit” or “circuitry” used herein are to be interpreted in asense not only including hardware but also software, firmware or anycombinations thereof. The term “data” may be interpreted to include anyform of representation such as an analog signal representation, adigital signal representation, a modulation onto carrier signals etc.The term “information” may in addition to any form of digitalinformation also include other forms of representing information. Theterm “entity” or “unit” may in embodiments include any device, apparatuscircuits, hardware, software, firmware, chips or other semiconductors aswell as logical units or sub-units or physical implementations etc.Furthermore the terms “coupled” or “connected” may be interpreted in abroad sense not only covering direct but also indirect coupling.

It is further to be noted that embodiments described in combination withspecific entities may in addition to an implementation in these entityalso include one or more implementations in one or more sub-entities orsub-divisions of said described entity.

The accompanying drawings that form a part hereof show by way ofillustration, and not of limitation, specific embodiments in which thesubject matter may be practiced.

In the foregoing Detailed Description, it can be seen that variousfeatures are grouped together in a single embodiment for the purpose ofstreamlining the disclosure. This method of disclosure is not to beinterpreted as reflecting an intention that the claimed embodimentsrequire more features than are expressly recited in each claim. Rather,as the following claims reflect, inventive subject matter lies in lessthan all features of a single disclosed embodiment. Thus the followingclaims are hereby incorporated into the Detailed Description, where eachclaim may stand on its own as a separate embodiment. While each claimmay stand on its own as a separate embodiment, it is to be noted that—although a dependent claim may refer in the claims to a specificcombination with one or more other claims—other embodiments may alsoinclude a combination of the dependent claim with the subject matter ofeach other dependent claim. Such combinations are proposed herein unlessit is stated that a specific combination is not intended. Furthermore,it is intended to include also features of a claim to any otherindependent claim even if this claim is not directly made dependent tothe independent claim.

It is further to be noted that methods disclosed in the specification orin the claims may be implemented by a device having means for performingeach of the respective steps of these methods or a circuit configuredfor performing the respective steps of these methods.

Further, it is to be understood that the disclosure of multiple steps orfunctions disclosed in the specification or claims may not be construedas to be within a specific order. Therefore, the disclosure of multiplesteps or functions will not limit these to a particular order unlesssuch steps or functions are not interchangeable for technical reasons.

Furthermore, in some embodiments a single step may include or may bebroken into multiple sub-steps. Such sub-steps may be included and partof the disclosure of this single step unless explicitly excluded.

What is claimed is:
 1. A method, comprising: providing first informationfrom a first unit into a first information storage for performing afirst operation of a processing unit; wherein during the first operationof the processing unit second information is transferred between theprocessing unit and the at least first information storage, wherein thefirst information storage comprises during the first operation of theprocessing unit an access protection in which the first informationstorage is not accessible for the first unit, wherein a data processingtype during the first operation of the processing unit is selectable bythe first unit by writing an operation code to an operation codestorage, wherein the data processing type determines an accessprotection type of the first operation during the first operation. 2.The method according to claim 1, wherein the first information storageis read-accessible and write-accessible during the first operation ofthe processing unit only for the processing unit.
 3. The methodaccording to claim 1, further comprising: providing the firstinformation from the first information storage to the processing unit;and calculating at least one result during the first operation based onthe first information.
 4. The method according to claim 1, wherein theaccess protection provides for at least one portion or at least onesub-storage of the first information storage a different accessprotection type than for another portion or another sub-storage of thefirst information storage.
 5. The method according to claim 1, whereinthe first unit is a program-controlled unit or a peripheral.
 6. Themethod according to claim 1, wherein the first operation includes anexecution of a subroutine or an execution of a sequence of subroutinesor an execution of a command or an execution of a sequence of commands,wherein the first information includes at least one of the following: aninput parameter for the subroutine or the sequence of subroutines or thecommand or the sequence of commands, and an identifier for the type ofthe subroutine or command.
 7. The method according to claim 1, whereinthe first operation is an execution of at least one of a subroutine or acommand or a sequence of subroutines or a sequence of commands, whereinthe first information storage is automatically locked against read/writeaccess when execution of the operation starts.
 8. The method accordingto claim 1, wherein the first operation is an execution of a sequence ofoperations, wherein between two successive operations of the sequence ofoperations an access by the first unit on the first information storageis selected dependent on the previous executed operation of the twosuccessive operations to be in one of the following access modes:write-enabled and read-blocked, write-enabled and read-enabled,write-blocked and read-blocked, write-blocked and read-enabled.
 9. Themethod according to claim 1, wherein the first unit writes an operationcode from the first unit to an operation code storage for initiating thefirst operation by the processing unit, wherein the first informationstorage is activated for access protection by the writing of theoperation code to the operation code storage.
 10. The method accordingto claim 1, wherein the first unit writes an operation code from thefirst unit to an operation code storage for initiating the firstoperation by the processing unit; and wherein the operation code storageis protected against writing of operation codes during the firstoperation.
 11. The method according to claim 10, wherein the operationcode storage is selectively protected against writing of operation codesduring the first operation such that the operation code storage iswrite-protected with respect to a first set of operation codes and theoperation code storage is write-enabled for writing of at least oneother operation code.
 12. The method according to claim 1, wherein,after the execution, the first information storage is made accessiblefor the first unit for reading out at least one of: an output parameterof the first operation; a status of the first operation; and informationindicating an error occurred during the first operation.
 13. The methodaccording to claim 1, wherein, after aborting the first operation, atleast a part of the information which has been stored in the firstinformation storage during the first operation is not accessible for thefirst unit.
 14. The method according to claim 1, further comprising:storing a result of the first operation in the first informationstorage; deleting at least a part of the information stored in firstinformation storage, after the operation is completed or aborted; andproviding access for the first unit to read the result of the firstoperation after the deleting is completed.
 15. The method according toclaim 1, wherein a first part of information stored within the firstinformation storage during the first operation is prevented from beingoutput after the operation is completed or aborted, and wherein a secondpart of information within the first information storage is output tothe first unit after the first operation is completed.
 16. The methodaccording to claim 1, wherein the processing unit determines prior tothe first operation a configuration of the first information storage,wherein the configuration includes at least one of a size of the firstinformation storage, the sub-unit storages included in the firstinformation storage, a protection during the first operation for thefirst information storage.
 17. A device, comprising: an operation codestorage; a data storage for storing data transferred between a firstunit and a data processing unit; wherein the data processing unit isconfigured to perform a data processing operation based on an operationcode written in the operation code storage by the first unit; and acontroller to protect the data storage from access by the first unitwhen the data processing unit performs the data processing operation andto enable access for at least the first unit when the data processingoperation is completed, wherein the controller is configured to activatethe protection of the data storage from access by the first unit basedon the writing of an operation code into an operation code storage. 18.The device according to claim 17, wherein the data stored in the datastorage includes at least one input parameter of the data processing orat least one output parameter of the data processing.
 19. The deviceaccording to claim 17, wherein the data storage is during the dataprocessing operation readable and writeable only by the processing unit.20. The device according to claim 19, wherein the access by the firstunit is at least one of a write access by the first unit or a readaccess by the first unit and wherein the data storage provided for theat least one input parameter and the at least one output parameter isdynamically configurable depending on the data processing operation. 21.An information storage arrangement, comprising: an operation codestorage; a data storage, wherein the data storage includes a pluralityof sub-unit storages; a controller to configure, prior to a dataprocessing operation associated with an operation code stored in theoperation code storage, for each of the plurality of sub-unit storages aread/write protection during the execution of the operation code.